Publikace: An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application
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Janveja, Meenali
Sharma, Ashwani Kumar
Bhardwaj, Abhyuday
Pidanič, Jan
Trivedi, Gaurav
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IEEE (Institute of Electrical and Electronics Engineers)
Abstrakt
Continuous monitoring of the electrical activity of heart signals using wearable Internet of Healthcare Things (IoHTs) devices plays a crucial role in decreasing mortality rates. However, this continuous monitoring using an electrocardiogram (ECG) or vectorcardiogram (VCG) generates huge clinical data. Moreover, these devices are constrained in terms of on-chip storage, data transmission capacity, and power. Thus, handling a large amount of data is difficult with these devices, making it necessary to compress these data for storage and transmission. Lossless or near-lossless data compression solves this problem, ensuring that no relevant physiological/clinical information is lost in the compression process. Therefore, low-power, resource-efficient, and lossless VLSI architectures are proposed in this article to compress multichannel ECG/VCG data. The designs are tested using the PTB database for both ECG and VCG data and can achieve compression ratios (CRs) of $3.857$ and $4.45$ with minimal power and area requirements making them suitable for low-power wearable healthcare devices.
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Klíčová slova
Electrocardiography, Data compression, Hardware, Very large scale integration, Heart, Medical services, Prediction algorithms, Compression, electrocardiogram (ECG), Internet of Healthcare Thing (IoHT), low-power, vectorcardiogram (VCG), Elektrokardiografie, Komprese dat, Hardware, Velmi rozsáhlá integrace, Srdce, Zdravotnické služby, Predikční algoritmy, Komprese, Elektrokardiogram (EKG), Internet of Healthcare Thing (IoHT), nízká spotřeba, Vektorový kardiogram (VCG)