An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices

Abstract

Sleep disorders are a common detrimental health condition that reduces quality of life. Among different sleep disorders, Obstructive Sleep Apnea (OSA) is one of the most common sleep disorders. OSA is characterized by a reduction or cessation of airflow during sleep. However, due to expensive and cumbersome detection process, only 10% of the OSA cases are actually diagnosed in the real world. To overcome this challenge, an area and power efficient VLSI Architecture for non-invasive detection of OSA, using features of ECG signal and support vector machines (SVM), is proposed in this manuscript. The proposed classifier achieves an accuracy of 84.60% and sensitivity and specificity of 83.85% and 85.58% respectively. The design is further synthesised using 180 nm Bulk CMOS technology consuming 0.46 mu W power at 1 kHz and occupies an area of 0.429 mm(2). The low-power implementation of the proposed design makes it suitable for preventive health wearable devices.